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Full-channel logic analysis highlight of DDR test suite.


A comprehensive DDR3 protocol debug and validation test suite for digital designers developing computer and embedded memory applications features a fast, full-channel logic analysis tool. The 16962A is a logic analysis module with 2.0GT/s state speed and 2-GHz trigger sequence speed.

The DDR test suite also includes the W3630A Series DDR3 BGA Probe and the N4835A DDR3 Slot Inter-poser. The probe, which provides direct access to the balls of the DRAM with low loading and minimal impact to signal integrity on embedded system design, is used with oscilloscopes and logic analyzers to perform physical-layer and functional test. The slot interposer enables up to 1.6-GT/s high-speed memory bus access and provides a nonintrusive probing design for accessing DDR3 DIMM. Agilent Technologies, www.rsleads.com/907ee-177

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COPYRIGHT 2009 Nelson Publishing Reproduced with permission of the copyright holder. Further reproduction or distribution is prohibited without permission.

Copyright 2009 Gale, Cengage Learning. All rights reserved. Gale Group is a Thomson Corporation Company.

NOTE: All illustrations and photos have been removed from this article.


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